发明名称 |
Gate contact with vertical isolation from source-drain |
摘要 |
A method of forming a semiconductor structure includes forming a gate structure having a first conductive material above a semiconductor substrate, gate spacers on opposing sides of the first conductive material, and a first interlevel dielectric (ILD) layer surrounding the gate spacers and the first conductive material. An upper portion of the first conductive material is recessed. The gate spacers are recessed until a height of the gate spacers is less than a height of the gate structure. An isolation liner is deposited above the gate spacers and the first conductive material. A portion of the isolation liner is removed so that a top surface of the first conductive material is exposed. A second conductive material is deposited in a contact hole created above the first conductive material and the gate spacers to form a gate contact. |
申请公布号 |
US9349598(B2) |
申请公布日期 |
2016.05.24 |
申请号 |
US201514832530 |
申请日期 |
2015.08.21 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION;GLOBALFOUNDRIES INC. |
发明人 |
Horak David V.;Ponoth Shom S.;Pranatharthiharan Balasubramanian;Xie Ruilong |
分类号 |
H01L21/28;H01L29/06;H01L29/417;H01L29/51;H01L29/49;H01L29/423;H01L29/66 |
主分类号 |
H01L21/28 |
代理机构 |
Scully, Scott, Murphy & Presser, P.C. |
代理人 |
Scully, Scott, Murphy & Presser, P.C. ;Bortnick, Esq. Bryan |
主权项 |
1. A semiconductor structure comprising:
gate spacers located on opposite sides of a gate structure on a semiconductor substrate, the gate structure having a height greater than a height of the gate spacers; an interlevel dielectric (ILD) layer located above the semiconductor substrate; an isolation liner located above the gate spacers, the isolation liner filling a space between a first conductive material of the gate structure and an exposed sidewall of the ILD layer; and a gate contact electrically connected to the gate structure, the gate contact vertically contacting the first conductive material of the gate structure and the isolation liner, wherein a top surface of the ILD layer is located above a top surface of the first conductive material of the gate structure and a top surface of the isolation liner. |
地址 |
Armonk NY US |