| 摘要 |
PURPOSE:To extend the margin of color killer, by correcting the pulse width and period of a vertical pulse and increasing/decreasing the number of pulses of a horizontal pulse given to an FF in response to a filler voltage so as to correct surely the operating phase of the FF. CONSTITUTION:A phase locked loop is constituted with an AFCP circuit 13 and a local oscillator 14 of a receiver, a local oscillating output in synchronizing with a burst signal is given to a B-Y demodulator 5 and a 90 deg. phase changeover switch 15, and the switch 15 is changed over with an output of the FF16. A vertical control pulse is inputted to an input terminal 26 of this chrominance signal processing circuit, the synchronism of the vertical pulse is corrected at a monostable multivibrator 29, and the pulse width is corrected with a differentiation circuit 30. The vertical pulse corrected from this circuit 30 is applied to one input of an NAND gate 27 and an inverting output of a color killer voltage Vk from a comparison circuit 20 is inputted to the other input of the gate 27. Further, an output in response to the killer voltage from the gate 27 is applied to the FF16, the number of pulses of the horizontal pulse given to the FF16 is increased/decreased, allowing to correct the operating phase of the FF16 surely. |
