发明名称 VARIABLE CAPACITANCE ELEMENT
摘要 PURPOSE:To eliminate the detuning and then improve the characteristic of cross modulation by a method wherein the titled device is so constructed that the surface potential of a semiconductor substrate under a capacitance read-out electrode is put in the state of accumulation and that a capacitance value read out from a capacitance readout part by a bias voltage is controlled so as to be either large or small. CONSTITUTION:Depletion layer parts 23 are composed of P<+> type regions 12A and 12B and electrodes 16A and 16B provided thereon, and the capacitance read-out part 24 is composed of insulation films 14 and electrodes 17 provided thereon. The bias voltage VB which reversely biases a P-N junction 13 is impressed between leadout terminals 18 and 19, which voltage is made variable; thereby the width of the depletion layer 21 varies, and the variation of capacitances owing to it is read out from between lead-out terminals 18 and 20. Accordingly the characteristic of capacitance C to voltage V can be obtained. Where, the capacitance H is the value when the reverse bias voltage VB is zero, and the capacitance L is the value at the point of VBL after passage through the threshold voltage VBT by the increase of the reverse bias voltage VB. Each value shows the maximum value of capacitance Cmax and the minimum one Cmin in the characteristic of MIS C-V.
申请公布号 JPS59154077(A) 申请公布日期 1984.09.03
申请号 JP19830027748 申请日期 1983.02.23
申请人 CLARION KK 发明人 SAKAI TAKAMASA
分类号 H01L29/93;H01L29/94 主分类号 H01L29/93
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