| 摘要 |
<p>PURPOSE:To prevent internal data from being broken down at the time of backup of a memory by providing the capacity for lowering a high frequency impedance of an active enable input line and a resistance for discharging its charge at the time when an external power source is turned off. CONSTITUTION:Between an active enable input line 9a of an address decoding circuit 8 for selecting volatile memory circuits 121-12n, and OV power source 20, a capacitor 2 for lowering a high frequency impedance of the line 9a and a resistance 1 for discharging slowly a charge of the capacitor 2 at the time when an external 5V power source 7 is turned off are provided. In such a state, in the case a power source 7 is supplied, the capacitor 2 is charged to the same level as an output terminal 5 of a power supply voltage detecting circuit 3, and when the power source 7 is turned off, the terminal 5 outputs an 'L' signal, and a memory protection is applied. Subsequently, an 'L' active enable terminal 10 of the circuit 8 becomes an 'H' level, a delay of the memory protection is prevented, and a break-down of internal holding data is prevented.</p> |
