发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To prevent the generation of malfunction in a data delay circuit by providing the semiconductor integrated circuit with an output buffer control circuit for setting up the output data of a data detection circuit to a state inhibiting its output from an output buffer circuit for a prescribed period based on a pulse signal outputted from an address change detecting circuit. CONSTITUTION:The data delay circuit 9 and a data latch circuit 10 are inserted between a sense amplifier circuit 7 and the output buffer circuit 8. The output buffer control circuit 11 generates a delay signal for setting up the delay time of the circuit 9 to a short value when data detected by the data detecting circuit 12 is not outputted from the circuit 8, and setting up the delay time to a longer value when data are outputted from the circuit 8. The circuit 9 is set up so as not to generate the delay signal after stopping the generation of the pulse output signal from the circuit 12. Consequently, the generation of malfunction due to power supply variation at the time of changing output data or the input of noise from the external can be prevented.</p>
申请公布号 JPH04109494(A) 申请公布日期 1992.04.10
申请号 JP19900228664 申请日期 1990.08.30
申请人 TOSHIBA CORP;TOUSHIBA MAIKURO EREKUTORONIKUSU KK;TOSBAC COMPUTER SYST CO LTD 发明人 KATO HIDEO;NAKAI HIROTO;IWAHASHI HIROSHI;HIRAGA NOBUAKI
分类号 G11C11/41;G11C7/02;G11C7/06;G11C7/10;G11C8/18;G11C11/407;G11C11/409;G11C16/06 主分类号 G11C11/41
代理机构 代理人
主权项
地址