| 摘要 |
<p>PURPOSE: To enable a first MOS transistor and a second MOS transistor to be optimized in performance by a method, wherein the gate side wall spacers of the MOS transistors are set different from each other in thickeness. CONSTITUTION: An NMOS transistor has a structure such that field oxide films 4 are provided to a P-type well region 2, a gate electrode 6 is formed in an active region at the center of a semiconductor substrate through the intermediary of a gate oxide film 5, and an n<-> -type impurity region 7 self-aligned with the gate electrode 6 is formed in the active region inside the semiconductor substrate adjacent to its surface. The n<-> -type impurity region 7 and an n<+> -type impurity 9 self-aligned with the side wall spacer 8a of the gate electrode 6 are provided. The thickness t2 of the gate sidewall spacer 8b of a PMOS transistor is set larger than that of t1 of the gate sidewall spacer 8a of the NMOS transistor. By this setup, two transistors can be optimized in performance.</p> |
