发明名称 |
ARRANGEMENT OF INTEGRATED CIRCUIT ON A SEMICONDUCTOR SUBSTRATE |
摘要 |
<p>An IC is provided with supply pins extending beyond the chip's encapsulation. The location of the supply pins is chosen so as to minimize the length of the associated bonding wires. Moreover the supply pins are located next to each other so as to reduce the effective inductance of the associated bonding wires. Output pins connected with on-chip buffers are located next to the supply pins so as to reduce the length of the buffer's supply lines, giving rise to a further reduction is inductive parasitic effects. <IMAGE></p> |
申请公布号 |
CZ9000649(A3) |
申请公布日期 |
1997.01.15 |
申请号 |
CS19900000649 |
申请日期 |
1990.02.09 |
申请人 |
PHILIPS ELECTRONICS N. V. |
发明人 |
SALTERS ROELOF HERMAN WILLEM |
分类号 |
G11C11/41;H01L23/48;H01L23/495;H01L23/50;H01L23/64;H01L27/04;H01L27/10;(IPC1-7):H01L23/48 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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