Method for the positioning/routing of a global clock circuit on an integrated circuit, and associated devices

摘要

A method for positioning/routing a clock circuit for an integrated circuit compensates for phase differences by adjusting secondary amplifiers having adjustable input delays. The method includes the steps of positioning first conductive lines parallel to a first direction evenly spaced with respect to the second direction. The first conductive lines are connected to outputs of the first amplifiers. A balanced tree-like structure provides each of the first amplifiers a clock signal coming from a single source. The method further includes the steps of positioning functional blocks for forming the integrated circuit, and the positioning of second lines parallel to the second direction. Each secondary amplifier is routed to the closest second line. An equivalent electrical diagram corresponding to the path taken by the clock signal between the input of the tree-like structure device and the input of each secondary amplifier is determined. The analog simulation of the equivalent electrical diagram and the measurement of the phase delays at the input of each secondary amplifier are performed. The input delay of each secondary amplifier is then adjusted to correspond to the largest measured phase delay.