MEMORY PAUSE DEVICE AND MEMORY PAUSE METHOD

摘要

PROBLEM TO BE SOLVED: To stabilize a test by reducing a current flowing at the time of memory pause test, to perform plural memory pause tests simultaneously and quickly, and to easily detect a memory in which a fault exists in LSI where plural memories are mounted. SOLUTION: Data for test is inputted successively to each memory block 21-23 from each input terminal 101-103 utilizing a control circuits 5 incorporating flip-flop circuits 51-53 and selectors 31-39. Thereby, each memory is enabled to have an enable state and a disable state in chip-select(CS). Further, an exclusive OR circuit and an OR circuit being not illustrated are used.