| 摘要 |
A peak detecting device which can efficiently detect a peak of an analog signal in a smaller error for a short time without making a sampling frequency higher. The analog signal processing apparatus (1) as the peak detecting device comprises: the frequency-dividing ratio setting device (2) for outputting the frequency-dividing ratio setting signal (2a); the frequency divider (3) for frequency-dividing the frequency of the reference clock signal (1b) by the frequency-dividing ratio which is changed by the frequency-dividing ratio setting signal (2a), to generate the sampling clock signal (3a); the A/D converter (4) for carrying out the sampling of the analog input signal (1a) at the clock timing which is synchronized with the sampling clock signal (3a); the sampling data memory (5) for memorizing the digital data (4a) which are obtained by sampling by the A/D converter (4); and the data processor (6) for reading out the digital data (4a) as the digital data (5a), to determine the peak of the digital data (5a).
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