发明名称 NOISE ELIMINATION CIRCUIT
摘要 PURPOSE:To maintain a duty ratio by providing a leading edge noise elimination circuit for eliminating leading edge noise from input pulse signals and a trailing edge noise elimination circuit for eliminating trailing edge noise from leading edge noise eliminated signals. CONSTITUTION:The leading edge noise elimination circuit 10 eliminates the leading edge noise from the input pulse signals Din and outputs inverted signals Dlne and the leading edge noise elimination circuit 10 is constituted of delay circuits 11 and 12, an inverter 13, a monostable multivibrator 14 and a NOR gate 15. The trailing edge noise elimination circuit 20 eliminates the noise generated at the time of the rise of the leading edge noise eliminated inverted signals Dlne, that is the trailing edge noise of the input pulse signals Din, and outputs output pulse signals Dout. The trailing noise elimination circuit 20 is constituted of sub-delay elements 21 and 22, the inverter 23, the monostable multivibrator 24 and the NOR gate 25.
申请公布号 JPH07297690(A) 申请公布日期 1995.11.10
申请号 JP19940090094 申请日期 1994.04.27
申请人 NEC CORP 发明人 SHIMOMURA YUKA;AOKI YASUSHI
分类号 H03K5/1252 主分类号 H03K5/1252
代理机构 代理人
主权项
地址