| 摘要 |
A motion estimation system is provided to minimize a hardware source by being based on a parallel processing processor for 2D SAD(Sum of Absolute Difference) operation and an exclusive cache, thereby simplifying the hardware structure and improving the operation speed thereof. A motion estimation system includes a DMA(Direct Memory Access) controller(50) connected to a video data bus(10) and having a current picture storing part(30) for storing a current picture data in a motion search area and a reference picture buffer part(40) for storing reference picture data in the motion search area, wherein the DMA controller reads out the reference picture data from the reference picture buffer part in sequence. A parallel processing processor(60) processes SAD operation between the current picture data and the reference picture data in parallel per pixel. A control register(70) controls resister control among the video data bus, the DMA controller and the parallel processing processor. A reference picture cache part(20) is provided between the video data bus and the reference picture buffer part for buffering the reference picture data.
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