Improper voltage level detection in emulation systems

摘要

Method and apparatus for detecting an improper voltage levels between a hardware emulator and an auxiliary hardware device are provided. In various implementations, a voltage level detector is attached to a bus that connects an emulator with an auxiliary hardware device. Subsequently, the voltage level detector can be used to detect when operating conditions on the bus are outside specification. More specifically, when the voltage level on the bus falls outside a threshold level, the voltage level detector may be used to alert a user, pause operation of the emulator or both.

主权项

1. An emulator apparatus comprising:
an emulator including a plurality of configurable logic blocks for emulating a design for an integrated circuit; a signal line connecting the emulator to a hardware component; a voltage level detector connected to the signal line, the voltage level detector configured to detect whether a voltage level of a signal transmitted on the signal line is within a first predetermined range or within a second predetermined range, the voltage level detector including an output indicating when a voltage level of a signal transmitted on the signal line is outside of the first predetermined range and outside of the second predetermined range, the voltage level detector comprising:
a first set of resistors;a first operational amplifier including an inverting input connected to an output of the first set of resistors and a non-inverting input connected to the signal line;a second set of resistors;a second operational amplifier including a non-inverting input connected to an output of the second set of resistors and an inverting input connected to the signal line; andan exclusive-or gate including a first input connected to an output of the first operational amplifier and a second input connected to an output of the second operational amplifier, the output of the exclusive-or gate being the output of the voltage level detector; and a sampling circuit configured to sample the output of the voltage level detector at a user specified clock.