发明名称 Semiconductor structure and method for manufacturing the same
摘要 One embodiment of present invention provides a method for manufacturing a semiconductor structure, which comprises: forming a gate stack on a semiconductor substrate and removing parts of the substrates situated on two sides of the gate stack; forming sidewall spacers on sidewalls of the gate stack and on sidewalls of the part of the substrate under the gate stack; forming doped regions in parts of the substrate on two sides of the gate stack, and forming a first dielectric layer to cover the entire semiconductor structure; selectively removing parts of the gate stack and parts of the first dielectric layer to form a channel region opening and source/drain region openings; forming a high K dielectric layer on sidewalls of the channel region opening; and implementing epitaxy process to form a continuous fin structure that spans across the channel region opening and the source/drain region openings.
申请公布号 US9419108(B2) 申请公布日期 2016.08.16
申请号 US201214406904 申请日期 2012.08.17
申请人 INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES 发明人 Liang Qingqing;Zhong Huicai;Zhu Huilong;Zhao Chao;Ye Tianchun
分类号 H01L29/66;H01L29/78 主分类号 H01L29/66
代理机构 Goodwin Procter LLP 代理人 Goodwin Procter LLP
主权项 1. A method for manufacturing a semiconductor structure, comprising: a) forming a gate stack on a semiconductor substrate (100) and removing parts of the substrates situated on two sides of the gate stack; b) forming sidewall spacers (230) on sidewalls of the gate stack and on sidewalls of the part of the substrate (100) under the gate stack; c) forming doped regions (110) in substrates on two sides of the gate stack, and forming a first dielectric layer (300) to cover the entire semiconductor structure; d) selectively removing parts of the gate stack and parts of the first dielectric layer (300) in the direction of the width of the gate stack to form a channel region opening (211) and source/drain region openings (212) on two sides thereof; e) forming a high K dielectric layer (240) on sidewalls of the channel region opening (211); and f) implementing epitaxy process to form a continuous fin structure (250) that spans across the channel region opening (211) and the source/drain region openings (212).
地址 Beijing CN