发明名称 Method of producing multilayer backplane
摘要 A method of forming an electrical backplane comprising providing an initially oversized ground and potential plate, forming discontinuous slots in a staggered relationship near the edges of the top surface of one of the plates and the bottom surface of the other plates, laminating the plates together by filling the slots with insulative material and trimming the edge portions off by cutting through the filled slots and webs connecting the slots whereby exposed backplane edges lie opposite insulation in the slots of the plates.
申请公布号 US4250616(A) 申请公布日期 1981.02.17
申请号 US19790023146 申请日期 1979.03.23
申请人 METHODE ELECTRONICS, INC. 发明人 KLIMEK, JOHN J.;TESCH, CHARLES L.;FEO, ERNEST M.;LESKY, RONALD W.
分类号 H01R12/04;B32B15/08;H01R12/18;H05K1/02;H05K1/05;H05K3/00;H05K3/40;H05K3/44;H05K3/46;H05K7/08;(IPC1-7):H05K3/36 主分类号 H01R12/04
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