| 摘要 |
Processes for manufacturing insulated-gate semiconductor devices characterized by involving a minimal number of photolithographic masking steps and being fail-safe in a number of respects. A number of process alternatives are disclosed for forming a shorting extension of a base region up through and to a portion of the surface of a source region, many of these process alternatives involving self-masking techniques to define the source region surface portion. Two general MOSFET structures are formed in accordance with the procedures of the invention. One structure has metallized gate terminal fingers, and is formed employing one-mask processes. The other structure has gate fingers encased in insulating oxide and connected to remote gate contacts. For both structures, selective oxidation of the polysilicon gate electrode material is preferred, and various approaches to this selective oxidation are described.
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