发明名称 MEMORY SWITCHING CIRCUIT FOR COMPUTER
摘要 PURPOSE:To avoid complicatedness of a control program and the increase of the data processing time and to increase the address area that can be designated by a CPU, by performing a switching action between a program memory and a data memory in terms of hardware. CONSTITUTION:The length of an instruction is checked every time the instruction is read out of a program memory 4. Then the signal delivered from an OR gate 11 is kept at an H level during the instruction reading time equivalent to the instruction length data. Thus the memory 4 is controlled to an active state. Therefore the memory which is automatically read out when a CPU 11 reads out the instruction of a control program and the normal data is changed between the memory 4 and a data memory 5. Then the control program can be simplified and at the same time the data processing time is shortened since it is not required to perform a switching action between both memories 4 and 5 in terms of a program.
申请公布号 JPS62182851(A) 申请公布日期 1987.08.11
申请号 JP19860022132 申请日期 1986.02.05
申请人 TOKYO ELECTRIC CO LTD 发明人 SUGIYAMA TOSHIO
分类号 G06F12/06 主分类号 G06F12/06
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