发明名称 |
MAKING METHOD OF LOWER GATE TFT |
摘要 |
formulating a polysilicon layer pattern used for a gate electrode whose upper edge tilted by etching the polysilicon layer for an exposed gate electrode, by passivating a sensitive film pattern used for a gate electrode mask on the top after formulating the polysilicon layer used for the gate electrode on a insulating layer; formulating a polysilicon layer pattern used for source/drain and gate oxide film on top of whole body by eliminating the sensitive film pattern used for the gate electrode mask.
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申请公布号 |
KR960000227(B1) |
申请公布日期 |
1996.01.03 |
申请号 |
KR19920026705 |
申请日期 |
1992.12.30 |
申请人 |
HYUNDAI ELECTRONICS IND. CO., LTD. |
发明人 |
KIM, SEUNG - JOON;LEE, DONG - DUG |
分类号 |
H01L27/12;H01L29/786;(IPC1-7):H01L29/786 |
主分类号 |
H01L27/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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