发明名称
摘要 PURPOSE:To execute a test with satisfactory efficiency in a short time by successively changing the value of an outgoing line address and the value of an incoming line address for a test packet, transmitting the packet to the incoming line of a speech path switch to be tested, investigating the test packet to be sent from an n-th outgoing line of the channel switch to be tested in a fixed time and deciding propriety. CONSTITUTION:A speech path testing device is composed of a test packet insertion circuit, (n-1) outgoing line address increment circuit, test end detection circuit, outgoing line address reset circuit, incoming line address increment circuit, (n) first address exchange circuits, speed path switch SW1, for which normality is confirmed with constitution the same as a speech path switch SW2 to be tested, and (n) second address exchange circuits. The first test packet, for which both the value of the outgoing line address and the value of the incoming line address are set to '0', is transmitted to the first incoming line of the channel switch SW2 to be tested, which is equipped When the (n) incoming lines and the (n) outgoing lines. After this test packet is transmitted, within the fixed time, when the second packet, for which the value of the outgoing line address and the value of the incoming line address are set to the value of (n-1) is received from the n-th outgoing line of the speed path switch SW2 to be tested, it is decided that the test is normally finished.
申请公布号 JPH0813037(B2) 申请公布日期 1996.02.07
申请号 JP19890039646 申请日期 1989.02.20
申请人 发明人
分类号 H04Q1/24;H04L12/26;H04L12/28;H04L12/70;H04L12/931;H04Q3/00 主分类号 H04Q1/24
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