发明名称 |
Method for fabricating MOS transistor having raised source and drain |
摘要 |
A process for fabricating a semiconductor device comprising a raised source and drain. A semiconductor device is fabricated by a process comprising the following steps: forming active regions separated by isolation regions; forming at each active region a gate electrode structure; depositing a first dielectric layer and a second dielectric layer; removing the top portion of the second dielectric layer to expose the portion of the first dielectric layer that covers the gate electrode structure; forming on the substrate a patterned resist layer to mask portions of the second dielectric layer; forming trenches next to the gate electrode structure by removing the unmasked portions of the second dielectric layer; filling the trenches with a conductor; doping the conductor with dopants; and driving the dopants into the substrate to form the raised source and drain.
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申请公布号 |
US6150244(A) |
申请公布日期 |
2000.11.21 |
申请号 |
US19990467086 |
申请日期 |
1999.12.10 |
申请人 |
MOSEL VITELIC INC. |
发明人 |
NI, CHENG-TSUNG |
分类号 |
H01L21/225;H01L21/336;H01L21/60;(IPC1-7):H01L21/22 |
主分类号 |
H01L21/225 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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