| 摘要 |
A device and method for accessing a row of data in a semiconductor memory device in a single operation is disclosed. The device includes a row of latches having a width which matches the width of the memory array in the semiconductor memory device. The device includes precharge and equilibration circuitry associated with the row of latches and the row of sense amplifiers in device, and timing circuitry for controlling the operation of each in performing full page read and write operations. Writing a full row of data from the row of latches into a selected row of memory cells includes the steps of disconnecting the row of sense amplifiers from the reference voltage sources; equalizing voltage levels appearing on the bit lines of the semiconductor memory and the sense amplifiers; connecting a row of memory cells to the bit lines; driving at least one bit line of each pair of bit lines to a voltage level representing the data value stored in the corresponding latch; coupling the sense amplifiers to the reference voltage sources for powering the sense amplifiers; and disconnecting the row of memory cells from the bit lines.
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