发明名称 |
High-reliability damascene interconnect formation for semiconductor fabrication |
摘要 |
A high-reliability damascene interconnect structure and a method for forming the same are provided. An interlevel dielectric is formed over a semiconductor topography, and trenches for interconnects and/or vias are formed in the interlevel dielectric. A trench liner may then be deposited, followed by deposition of a low-resistance metal such as copper. The low-resistance metal deposition is preferably stopped before the trenches are entirely filled. Portions of the metal and trench liner external to the trenches are subsequently removed, such that low-resistance metal interconnect portions are formed. A high-melting-point metal, such as tungsten, is deposited over upper surfaces of the interconnect portions and interlevel dielectric. Portions of the high-melting-point metal are removed to form interconnects having a low-resistance metal lower portion and a high-melting-point metal upper portion. In one embodiment, the extrusion-prone lowresistance metal is removed from the vicinity of a ready extrusion path between the interlevel dielectric and an overlying dielectric. In another embodiment, the overlying metal is believed to prevent extrusion of the low-resistance metal by bonding with the low-resistance metal and by altering the electric field distribution between adjacent interconnects.
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申请公布号 |
US6157081(A) |
申请公布日期 |
2000.12.05 |
申请号 |
US19990265193 |
申请日期 |
1999.03.10 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
NARIMAN, HOMI E.;FULFORD, JR., H. JIM |
分类号 |
H01L21/768;H01L23/532;(IPC1-7):H01L23/48;H01L23/52;H01L29/40 |
主分类号 |
H01L21/768 |
代理机构 |
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主权项 |
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地址 |
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