Memory system including nonvolatile memory devices which contain multiple page buffers and control logic therein that support varying read voltage level test operations

摘要

A nonvolatile memory device includes an array of nonvolatile memory cells and a plurality of page buffers configured to receive a plurality of pages of data read from the same page in the array using different read voltage conditions. A control circuit is provided, which is electrically coupled to the plurality of page buffers. The control circuit is configured to perform a test operation by driving the plurality of page buffers with control signals that cause generation within the nonvolatile memory device of a string of XOR data bits, which are derived from a comparison of at least two of the multiple pages of data read from the same page of nonvolatile memory cells using the different read voltage conditions. An input/output device is provided, which is configured to output test data derived from the string of XOR data bits to another device located external to the nonvolatile memory device.

主权项

1. A memory system comprising:
a non-volatile memory; and a controller configured to control an operation of the non-volatile memory, wherein the non-volatile memory comprises: a memory cell array comprising a target page; a first page buffer configured to store first data read from the target page, which is selected according to a first read command output from the controller, using a first read voltage level changed according to a first read voltage level change command output from the controller; a second page buffer configured to store second data read from the target page, which is selected according to a second read command output from the controller, using a second read voltage level changed according to a second read voltage level change command output from the controller; and a third page buffer configured to generate data which is the same as bit-wise logical operation data with respect to the first data and second data by changing third data stored therein using at least part of the first data transmitted from the first page buffer and at least part of the second data transmitted from the second page buffer according to a command output from the controller.