发明名称 Contact for vertical memory with dopant diffusion stopper and associated fabrication method
摘要 A memory device and corresponding fabrication method prevent undesired diffusion of dopants from a silicon cap of a vertical NAND string to a channel film of the NAND string. Initially, a memory hole is provided in a stack of alternating control gate layers and dielectric layers. The memory hole is filled with annular films and a dielectric core filler. The dielectric core filler is etched back from a top of the memory hole to a topmost control gate layer, forming a void. A dopant stopper liner is deposited in the void before depositing n+ doped silicon which forms the silicon cap. The dopant stopper liner can be a conductive material such as metal or polysilicon doped with carbon. A conductive via is then formed above, and aligned with, the top of the silicon cap. A bit line may be formed over the conductive via.
申请公布号 US9406690(B2) 申请公布日期 2016.08.02
申请号 US201414572146 申请日期 2014.12.16
申请人 SanDisk Technologies LLC 发明人 Pang Liang;Pachamuthu Jayavel;Dong Yingda
分类号 H01L27/115;H01L27/105;H01L27/112;H01L29/66 主分类号 H01L27/115
代理机构 Vierra Magen Marcus LLP 代理人 Vierra Magen Marcus LLP
主权项 1. A method for fabricating a contact in a memory device, comprising: forming a vertically-extending memory hole in a stack, the stack comprising alternating control gate layers and dielectric layers; providing a channel film in the vertically-extending memory hole, a central void in the vertically-extending memory hole is formed within the channel film; providing a dielectric core filler in the central void; forming a void in the vertically-extending memory hole, the forming the void comprises etching back the dielectric core filler to provide an etched back dielectric core filler; providing a dopant stopper liner in the void, the dopant stopper liner is conductive and extends upward from a top surface of the etched back dielectric core filler to a top of the stack; providing n+ doped silicon in the void, above the dopant stopper liner, the n+ doped silicon conforms to the dopant stopper liner; providing a conductive via which extends above the stack, the conductive via has a bottom surface which rests on a top surface of the n+ doped silicon, wherein the channel film and the dielectric core filler extend to a top of the vertically-extending memory hole before the forming the void, and at least a portion of the channel film remains at the top of the stack after the etching back of the dielectric core filler; and performing ion implantation which implants ions at a top of the n+ doped silicon and at a top of the at least the portion of the channel film.
地址 Plano TX US