Embedded component device and manufacturing methods thereof

摘要

An embedded component device includes an electronic component including an electrical contact, an upper patterned conductive layer, a dielectric layer between the upper patterned conductive layer and the electronic component, a first electrical interconnect, a lower patterned conductive layer, a conductive via, and a second electrical interconnect. The dielectric layer has a first opening exposing the electrical contact, and a second opening extending from the lower patterned conductive layer to the upper patterned conductive layer. The first electrical interconnect extends from the electrical contact to the upper patterned conductive layer, and fills the first opening. The second opening has an upper portion exposing the upper patterned conductive layer and a lower portion exposing the lower patterned conductive layer. The conductive via is located at the lower portion of the second opening. The second electrical interconnect fills the upper portion of the second opening.

主权项

1. An embedded component device, comprising:
an electronic component including an electrical contact; an upper patterned conductive layer; a single dielectric layer between the upper patterned conductive layer and the electronic component, the dielectric layer having a first opening exposing the electrical contact; a first electrical interconnect extending from the electrical contact to the upper patterned conductive layer, wherein the first electrical interconnect fills the first opening; a lower patterned conductive layer embedded in the dielectric layer, the dielectric layer having a second opening extending from the lower patterned conductive layer to the upper patterned conductive layer, the second opening having an upper portion exposing the upper patterned conductive layer and a lower portion exposing the lower patterned conductive layer; a conductive via located at the lower portion of the second opening; and a second electrical interconnect filling the upper portion of the second opening; wherein the second electrical interconnect includes a top surface having a first area, and includes a bottom surface having a second area, and the first area is different from the second area; and wherein the conductive via includes an upper surface having a third area substantially parallel to the second area, and the third area is larger than the second area.