发明名称 ELECTRONIC TIMER
摘要 <p>PURPOSE:To decrease the peripheral circuit constitution for inputting and outputting a synchronizing pulse by using one port both as an output port of synchronizing pulse of a master clock, and an input port of a synchronizing pulse from an external master clock. CONSTITUTION:In case when a clock function part 1b has been operated as a master clock, the clock function part 1b outputs a synchronizing pulse from an input/output port P1 at zero minute and zero second of every just time and sends it out to a slave clock of the outside through a synchronizing input/output part 11 and a synchronizing pulse input/output terminal 16. Also, in case when the clock function part 1b has been operated as a slave clock, the clock function part 1b inputs the synchronizing pulse which is sent at every just time from the master clock which has been connected to the synchronizing pulse input/ output terminal 16, through the synchronizing input/output part 11 and the input/output port P1. In this way, by using one port as the input and the output, ports,a circuit constitution for inputting and outputting the synchronizing pulse can be decreased.</p>
申请公布号 JPS6215485(A) 申请公布日期 1987.01.23
申请号 JP19850154793 申请日期 1985.07.12
申请人 MATSUSHITA ELECTRIC WORKS LTD;MATSUSHITA ELECTRIC IND CO LTD 发明人 MATSUDA MASANORI;INOUE SATOSHI
分类号 G04G15/00;G04G99/00 主分类号 G04G15/00
代理机构 代理人
主权项
地址