CONNECTION METHOD OF WIRING OF WAFER SCALE INTEGRATED CIRCUIT AND ITS PACKAGE,申请号JP19890210469-传众专利搜索

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发明名称	CONNECTION METHOD OF WIRING OF WAFER SCALE INTEGRATED CIRCUIT AND ITS PACKAGE
摘要
申请公布号	JPH0374865(A)	申请公布日期	1991.03.29
申请号	JP19890210469	申请日期	1989.08.15
申请人	FUJITSU LTD	发明人	YAMASHITA YOSHIMI;TSUCHIYA SHINPEI
分类号	H01L23/52	主分类号	H01L23/52
代理机构		代理人
主权项
地址

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