| 摘要 |
The device easily analizes the programmable array logic(PAL) unit by using the general computer without an expensive speciallized analysis equipment. It comprises a port extender(20) controlling the I/O of a digital signal; a comparator(50), connected to the computer(10), generating the output only if the value compared between the signal of the port extender(20) and a 8 bit digital signal is low; a connector(40), for inserting or extracting the PAL unit, connected to the output terminals(PA0-PA7)(PB0-PB7) of the port extender(20) via buffers(30,30') and also to input terminals(PC0-PC7) of the port extender(20) via a buffer(30''); a dip switch(60) connected to the comparator(50).
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