PATH ALLOCATION SYSTEM AND METHOD HAVING DOUBLE LINK LIST QUEUES IMPLEMENTED WITH A DIGITAL SIGNAL PROCESSOR (DSP) FOR A HIGH PERFORMANCE FIBER OPTIC SWITCH

摘要

A fiber optic switch (30) interconnects ports (p1-pi) (33) for connection with respective fiber optic channels (32) so that a fiber optic network is realized. Channel modules (34) provide the ports (33). Each channel module (34) has a port intelligence mechanism (73) for each port and a memory interface system (72) for temporarily storing data passing to and from the ports (33). A switch module (36) having a main distribution network (42), an intermix distribution network (44), and a control distribution network interconnects the memory interface systems (72) and permits exchange of data among the ports (33) and memory interface systems (72). A path allocation system (50) controls the switch module (36) and allocates the data paths therethrough. The path allocation system (30) has a scheduler (104) which maintains a destination queue (Qp1-Qpi) for each of the ports (33). The destination queues are implemented with a double link list in a single memory configuration so that a separate queue structure in hardware is not necessary. Moreover, the scheduler (104) is implemented with a digital signal processor (DSP) with on-chip memory so that the queues are implemented within the on-chip memory and can be accessed at high speed.