| 摘要 |
The device has an input (E) supplied with the required gradient for the variable output value (G), provided at an output terminal (A). This is coupled to the output of a clocked adder (S) for increasing the output value at each clock pulse, in accordance with the required gradient. The gradient value may be represented by a digital value used for controlling a digital adder, which is followed by a digital to analog converter (DAC) with a smaller bit resolution.
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