发明名称 MOS transistor in an active region
摘要 After an isolation region is formed using a field-forming silicon nitride film, this silicon nitride film is patterned, thereby a gate trench is formed. Next, a gate electrode material is buried into the gate trench, and this is etched back. Thereafter, the silicon nitride is removed, thereby a contact hole is formed. A contact plug is buried into this contact hole. With this arrangement, the contact plug can be formed without using a diffusion layer contact pattern. At the same time, the periphery of the contact plug substantially coincides with a boundary between the element isolation region and the active region. Accordingly, the active region can be reduced.
申请公布号 US7307324(B2) 申请公布日期 2007.12.11
申请号 US20050249400 申请日期 2005.10.14
申请人 ELPIDA MEMORY, INC. 发明人 UCHIYAMA HIROYUKI
分类号 H01L29/76;H01L29/94;H01L31/00 主分类号 H01L29/76
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