发明名称 Self test for the phase angle of the data read clock signal DQS
摘要 The invention relates to a semiconductor memory apparatus having at least one clock input contact for inputting an external clock signal, at least one clock output contact for outputting a data read clock signal for reading data stored in the semiconductor memory apparatus, at least one data contact for outputting data stored in the semiconductor memory apparatus, at least one phase adjustment device which is designed for approximately adjusting a phase of the data read clock signal on the basis of a phase of the external clock signal at least one phase difference test device which is designed for approximately detecting a phase difference between the phase of the data read clock signal and the phase of the external clock signal and for outputting a test result on the basis of the detected phase difference.
申请公布号 US7307895(B2) 申请公布日期 2007.12.11
申请号 US20050227714 申请日期 2005.09.15
申请人 INFINEON TECHNOLOGIES AG 发明人 KUHN JUSTUS;SPIRKL WOLFGANG
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
主权项
地址