| 摘要 |
A clock recovery circuit capable of automatically adjusting the frequency range of a VCO (Voltage controlled Oscillator) without involving a look-up-table. The clock recovery circuit includes a main PLL (Phase locked loop) and an auxiliary PLL. The main PLL is a typical PLL for generating a main oscillation clock. The auxiliary PLL includes an auxiliary frequency detector for receiving the main oscillation clock and an auxiliary oscillation clock and generating an auxiliary frequency error signal, an auxiliary loop filter for receiving the auxiliary frequency error signal and generating a coarse control voltage, and an auxiliary VCO for receiving the coarse control voltage and a reference fine control voltage and generating the auxiliary oscillation clock. The VCO in the main PLL receives the coarse control voltage for setting the frequency range.
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