| 摘要 |
PROBLEM TO BE SOLVED: To solve the problem that a semiconductor device having a gate array on which a plurality of functional elements are arranged needs complicated delay time adjusting work using a plurality of delay elements and selectors. SOLUTION: A design method for the semiconductor includes a first defining step of defining a module composed of a plurality of functional elements, a second step of defining the position of a plurality of second functional elements, based on a module reference position that is a reference for the module, an arranging step of arranging the module on a gate array, and a calculating step of calculating the position of the plurality of second functional elements based on a gate array reference position of the gate array, according to the positional relation between the gate array reference position, which is a reference for the gate array, and the module reference position, which is the reference for the module, and the position relation between the module reference position and the position of the second functional elements. COPYRIGHT: (C)2008,JPO&INPIT
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