| 摘要 |
FIELD: digital instruments. SUBSTANCE: subtraction amplifier, gate, memory unit, digital demultiplexer are introduced to accomplish the goal of invention. In addition receiving buffer register for device address and channel number has bit of device operation mode. Said bit is connected to one input of gate and control input of digital demultiplexer, which first group of outputs is connected to inputs of transmission buffer data register. Second group of outputs of digital demultiplexer is connected to data inputs of memory unit. Address inputs of memory unit are connected to outputs for channel address of control unit of input device. Group of data outputs of memory unit is connected to inputs of digital-to-analog converter, which output and output of random access unit are connected to corresponding inputs of subtraction amplifier. Output of subtraction amplifier serves input of analog-to-digital converter, which data output is connected to input of digital demultiplexer. Output "analog-to-digital converter is ready" is connected to second input of gate, which output is connected to "read-write" input of memory unit. EFFECT: increased functional capabilities, increased precision, increased efficiency of load of central processor. |
