发明名称 HETERO-CHANNEL FINFET
摘要 A hetero-channel FinFET device provides enhanced switching performance over a FinFET device having a silicon channel, and is easier to integrate into a fabrication process than is a FinFET device having a germanium channel. A FinFET device featuring the heterogeneous Si/SiGe channel includes a fin having a central region made of silicon and sidewall regions made of SiGe. A hetero-channel pFET device in particular has higher carrier mobility and less gate-induced drain leakage current than either a silicon device or a SiGe device. The hetero-channel FinFET permits the SiGe portion of the channel to have a Ge concentration in the range of about 25-40% and permits the fin height to exceed 40 nm while remaining stable.
申请公布号 US2016190317(A1) 申请公布日期 2016.06.30
申请号 US201414587655 申请日期 2014.12.31
申请人 STMICROELECTRONICS, INC. ;GLOBALFOUNDRIES INC. ;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 LIU Qing;XIE Ruilong;YEH Chun-chen;CAI Xiuyu
分类号 H01L29/78;H01L21/02;H01L29/165;H01L29/40;H01L29/66;H01L29/417 主分类号 H01L29/78
代理机构 代理人
主权项 1. A transistor, comprising: a silicon substrate; a raised source region having a bottom layer of un-doped epitaxial SiGe and a top layer of doped epitaxial SiGe, the top layer of the raised source region being thicker than the bottom layer; a raised drain region having a bottom layer of un-doped epitaxial SiGe and a top layer of doped epitaxial SiGe, the top layer of the raised drain region being thicker than the bottom layer; a fin extending out from the silicon substrate, the fin having a central region made of silicon and side regions made of SiGe, providing a high-mobility current path that extends from the doped epitaxial SiGe through the side regions to the central region; and a metal gate structure positioned between the raised source and drain, the metal gate structure wrapping around three sides of the fin.
地址 Coppell TX US