| 摘要 |
1,110,587. Circuit assemblies; semi-conductor devices. TELEFUNKEN PATENTVERWERTUNGS-G.m.b.H. 21 July, 1965 [29 July, 1964; 23 Nov., 1964]. No. 31021/65. Headings H1K and H1R. In a method of making a microminiature circuit assembly, a solid state circuit produced in a semi-conductor body is attached to a selfsupporting insulating substrate, after which the individual devices comprised within the solid state circuit are separated from one another by the removal of semi-conductor material to avoid capacitive coupling. The solid state circuit may comprise an insulating passivation layer on the surface which is attached to the substrate, and a further passivation layer may be applied to the complete assembly. The insulating substrate may comprise a sintered, melted, or vapour-deposited layer of glass, or a ceramic body 9, Fig. 4, having a surface glaze 14, which is attached, directly or by means of a layer 15 of insulating solder, to a solid state circuit 16 having a passivation surface layer 1, e.g. of thermally grown silicon oxide. Active devices 2, formed within solid state circuit 16, are separated by the removal of semi-conductor material, as by etching or mechanically, and a resistor 11 is deposited on the exposed surface of passivation layer 1, being connected to one of a number of vapourdeposited electrodes (not shown) of devices 2. Another electrode is connected to a conductive path 17 of Cu or Ni-Cr-Au which is vapourdeposited on the substrate and forms at one end an electrode which co-operates with a vapourdeposited dielectric 18 and a second electrode 19 to form a capacitor. 20 is a meander-shaped resistor deposited on the substrate. Fig. 5 (not shown), depicts alternative capacitors utilizing the passivation layer 1 as dielectric. In Fig. 6 (not shown), passive components are formed on the passivation layer 1 of the solid state circuit and are then covered with a second passivation layer which is mounted on the substrate. Figs. 7-10 (not shown), depict methods of making external contact with deposited conductive layers of the assembly. Fig. 2 (not shown), illustrates the invention with reference to the production of a two-transistor NOR- gate. Solid state circuits may be disposed on opposite faces of a substrate, being interconnected by pins through the substrate. The substrate may comprise ferrite material, and may have a coil deposited thereon. |
