| 摘要 |
1,233,341. Data storage; decoders. INTERNATIONAL BUSINESS MACHINES CORP. 19 Dec., 1969 [15 Jan., 1969], No. 61991/69. Headings G4C and G4H. A memory array of cells 100, each formed of field effect transistors (FETs) the gate capacitance of one of which is charged to store information, comprises means including word and bit conductors for selecting a cell and means for biasing bit conductors associated with unselected cells to a given voltage. Decoders (not shown) energize a selected word line 105 and a selected bit select line 108 to read or write a bit using a pair of bit lines 115 as shown. When no word line is energized, an inverter 134 enables FETs 131 to apply a potential from 130 to all the bit lines 115, or the FETs 131 could be replaced by resistors 136 (shown dotted), or the potential could be applied to each unselected pair of bit lines 115 under control of an inverter 135, the purpose in each case being to prevent false writing. A plurality of arrays as above could be used, each providing one bit of a parallel word. Decoders.-Each decoder converts from binary code to 1-out-of n, using inverters and NORs constructed from FETs. |
