| 摘要 |
<p>PURPOSE:To reduce the program processing load on a CPU and to preliminarily set the frequency division ratio of an output clock signal by providing a memory circuit from which frequency division ratio set data is read out, a frequency division ratio setting circuit, and a counter circuit. CONSTITUTION:For the purpose of writing data for setting of a frequency division ratio in a ROM 17, data is preliminarily written in the ROM 7 through an address/data line 19 by a writer like a ROM writer. When the power source of a counter device where frequency division ratio set data is written in the incorporated ROM is turned on after this device is installed in a device requiring this device, the ROM 17 transfers frequency division ratio set data 18 to a frequency division ratio setting circuit 13. The circuit 13 sets the frequency division ratio by this data 18 and outputs a frequency division ratio control signal 16 to a counter 14. The counter 14 divides the frequency of an input clock 8 by the signal 16 and outputs the result as an output clock 9. Thus, the program processing load on the CPU is reduced and the frequency division ratio of the output clock signal is preliminarily set.</p> |
