发明名称 REFERENCE VOLTAGE GENERATING CIRCUIT IN MEMORY DEVICE
摘要 PURPOSE: To reduce a stand-by current and also to shorten an initial reference voltage forming time by supplying an output voltage from a low voltage generation circuit to a stand-by current control means and an initial voltage forming means through a low voltage supply line. CONSTITUTION: An output voltage of a low voltage generation circuit PG is supplied to a stand-by current control means 1 composed of enhancement type P MOS transistors M101 and M102 and an initial voltage forming means 2 composed of N-channel MOS transistor M106 through a low voltage supply line L1, and a reference voltage formed by a resistance means 3 composed of PMOS transistor M103, N-channel MOS transistor M104, and M105 is outputted from reference voltage output line L2. This configuration decreases a stand-by current flowing in the circuit and can quickly form an initial reference voltage.
申请公布号 JPH0278090(A) 申请公布日期 1990.03.19
申请号 JP19890129015 申请日期 1989.05.24
申请人 SANSEI ELECTRON CO LTD 发明人 JIE FUAN YU
分类号 G06F1/26;G05F3/24;G11C11/407 主分类号 G06F1/26
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