发明名称 |
VERFAHREN UND GERAET ZUR SYNCHRONISATIONSARBITRIERUNG |
摘要 |
A hierarchial selection hardware synchronization arbitration technique. A plurality of redundant computers each include a sync master counter (38), which is set to reflect the hierarchial selection of each computer. The sync master counter will be inhibited if a sync master signal (60) is present when the computer is activated or if a sync activity signal is present from a higher ranking computer. The computers each have a physical ranking (22, 24, 26, 28) to achieve the hierarchial selection and otherwise can be identical. If the sync master computer generates a fault signal or a fault is detected, then the hierarchial selection of the remaining computers is again commenced. |
申请公布号 |
DE69401345(D1) |
申请公布日期 |
1997.02.13 |
申请号 |
DE1994601345 |
申请日期 |
1994.02.25 |
申请人 |
HONEYWELL INC., MINNEAPOLIS, MINN., US |
发明人 |
SMITH, FREDERICK, L., LARGO, FL 34644, US |
分类号 |
G06F11/18;G06F11/20;G06F15/17;(IPC1-7):G06F11/16;G06F1/12;G06F15/16 |
主分类号 |
G06F11/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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