| 摘要 |
<p>PROBLEM TO BE SOLVED: To enable the detection of an idle state in the case of performing arithmetic operation for a long time by detecting whether an arithmetic processor is in the idle state or not while detecting whether an access signal is a code signal or a data signal and utilizing whether the access signal hits a cache memory or not. SOLUTION: When the access operation by an arithmetic processing circuit 1 is a code signal, the signal level of a signal kind-classified signal output terminal 1A is turned to L level, and when the access operation of that is a data signal, that signal level is turned to H level. Besides, when access to the cache memory hits, a signal at the H level is outputted to a hit signal output terminal 2A provided at a cache memory control circuit 2. Namely, while detecting whether the access signal is the code signal or the data signal and utilizing a signal showing whether the access signal hits the cache memory or not, detecting operation is performed to show whether the arithmetic processor is in the idle state or not.</p> |
