发明名称 COMPRESSED DATA DECODING DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To reduce a necessary circuit scale in parallel processing and also to perform time sharing processing. SOLUTION: A slice-detecting circuit 11 detects a start time position of a slice line. A buffer management table 2 manages information and empty information that show which system of a decoder circuit a buffer belongs to, and a write address generating part 4 writes encoded data to a buffer that is designated by the table 2 for every slice line. When a data request is generated from decoder circuits 13 and 13', a read address generating part 7 refers to the table 2 and reads encoded data that corresponds to the request. The circuits 13 and 13' decode the encoded data that has been read. Because the number of buffers to be used for the circuits 13 and 13' can be changed and also memory capacity that is needed for buffer management is small, flow is prevented and a circuit scale can be reduced.</p>
申请公布号 JPH10145237(A) 申请公布日期 1998.05.29
申请号 JP19960298796 申请日期 1996.11.11
申请人 TOSHIBA CORP 发明人 ABE SHUJI;FUKUSHIMA MICHIHIRO
分类号 H04N19/50;H03M7/00;H03M7/30;H04N1/41;H04N19/423;H04N19/426;H04N19/436;H04N19/44;H04N19/46;H04N19/70;(IPC1-7):H03M7/30;H04N7/32 主分类号 H04N19/50
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