| 摘要 |
PURPOSE: To improve test precision by demarcating data to an intermediate buffer memory for every device to be tested and setting access addresses as a test instruction sequence, and confirming whether or not the data in the intermediate buffer match with those in intermediate buffer memories of other devices to be tested according to the access addresses. CONSTITUTION: On the test device 1B, the devices to be tested 60-70 are provided with random instruction generation parts 71, 74, and 77, access area control parts 73, 75, and 78, and test control parts 73, 76, and 79. Instructions generated at the random instruction generation parts 71, 74, and 77 are regenerated at the access area control parts 73, 75, and 78 and set in an instruction sequence to be tested 411 in an instruction setting memory area 80. The instruction sequence to be tested 411 can be tested by the test control parts 73, 76, and 79 as to start and interruption processing, 1st-time and 2nd-time comparison processing, information confirmation based upon check points, etc. |
