| 摘要 |
An apparatus for and method of generating a signal having a programmable period and a programmable duty cycle. The apparatus includes an update sequencer circuit. The update sequencer circuit is configured to detect an updated period value and an updated duty cycle value, and to receive a period match signal, and in accordance therewith selectively generate a period write signal and a duty cycle write signal. A storage element is configured to receive the updated period value, the updated duty cycle value, the period write signal, and the duty cycle write signal, and in accordance therewith replace a period value with the updated period value and a duty cycle value with the updated duty cycle value. The update sequencer circuit eliminates the requirement for associated software to have a polling loop or an interrupt.
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