发明名称 System and method for processing an interrupt in a processor supporting multithread execution
摘要 A system and method is disclosed for the handling of interrupts by the disabled logical processors of an information handling system or computer system. An interrupt service routine is written to the read-only portion of system memory. Upon receipt of an interrupt, each disabled logical processor branches to the hard coded interrupt service routine. The interrupt service routine can be written to read only memory because the context, current instruction, and return state of the disabled logical processor are known, and the disabled logical processor will not need to write to system memory during the execution of the interrupt service routine. Following the handling of the interrupt by another logical processor of the computer system, each disabled logical processor returns to the halt state.
申请公布号 US2007088887(A1) 申请公布日期 2007.04.19
申请号 US20050251216 申请日期 2005.10.14
申请人 DELL PRODUCTS L.P. 发明人 MCFARLAND CHRISTOPHER H.;DIAZ JUAN F.
分类号 G06F13/24 主分类号 G06F13/24
代理机构 代理人
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