发明名称 Reliability test screen optimization
摘要 Methods and systems optimize power usage in an integrated circuit design by sorting the integrated circuit devices after manufacture into relatively slow integrated circuit devices and relatively fast integrated circuit devices to classify the integrated circuit devices into different voltage bins. The methods and systems establish a bin-specific reliability testing processes for each of the voltage bins and test the integrated circuit devices using a tester. This allows the methods and systems to identify as defective ones of the integrated circuit devices that fail the bin-specific integrated circuit reliability testing processes of a corresponding voltage bin. The methods and systems remove the defective ones of the integrated circuit devices to allow only non-defective integrated circuit devices to remain and supply the non-defective integrated circuit devices to a customer.
申请公布号 US9429619(B2) 申请公布日期 2016.08.30
申请号 US201213564337 申请日期 2012.08.01
申请人 GLOBALFOUNDRIES INC. 发明人 Anemikos Theodoros E.;Bickford Jeanne P.;Dewey Douglas S.;Viau, Jr. Ernest A.
分类号 G06F19/00;G01R31/28;G05B19/418;G01R31/317 主分类号 G06F19/00
代理机构 Gibb & Riley, LLC 代理人 Gibb & Riley, LLC ;Canale Anthony J.
主权项 1. A method of optimizing power usage in an integrated circuit design, said method comprising: manufacturing integrated circuit devices according to an integrated circuit design using manufacturing equipment, said integrated circuit design producing integrated circuit devices that are identically designed and perform at different operating speeds caused by manufacturing process variations; sorting said integrated circuit devices after manufacture into relatively slow integrated circuit devices and relatively fast integrated circuit devices to classify said integrated circuit devices into different voltage bins, said relatively fast integrated circuit devices having a smaller delay and consuming more power than said relatively slow integrated circuit devices, establishing a bin-specific reliability testing processes comprising enhanced voltage screening and dynamic voltage screening for each of said voltage bins; performing reliability testing using said bin-specific reliability testing processes for each of said voltage bins on said integrated circuit devices using a tester; identifying as defective ones of said integrated circuit devices that fail said bin-specific reliability testing processes of a corresponding voltage bin into which each of said integrated circuit devices has been classified; removing said defective ones of said integrated circuit devices to allow only non-defective integrated circuit devices to remain; and supplying said non-defective integrated circuit devices to a customer.
地址 Grand Cayman KY