发明名称 VARIABLE RESISTANCE MEMORY DEVICE AND VERIFY METHOD THEREOF
摘要 A resistance variable memory has a controller configured to control a voltage to be applied to the memory cell. The controller has a reset operation to bring the memory cell into a reset state, a first operation to apply a set voltage between the first wire and the second wire, a second operation to determine whether a current flowing to the memory cell to be set exceeds a first threshold when a first reading voltage is applied between the first wire and the second wire, a third operation to determine whether a current flowing to the memory cell to be set exceeds a second threshold when a second reading voltage is applied between the first wire and the second wire, and a fourth operation to apply a second reset voltage, between the first wire and the second wire.
申请公布号 US2016260482(A1) 申请公布日期 2016.09.08
申请号 US201514847395 申请日期 2015.09.08
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SUGIMAE Kikuko;Ichihara Reika
分类号 G11C13/00 主分类号 G11C13/00
代理机构 代理人
主权项 1. A resistance variable memory, comprising: a plurality of first wires; a plurality of second wires extending in a direction crossing to the plurality of first wires; a plurality of memory cells including variable resistance elements arranged at each of crossing points between the first wires and the second wires; and a controller configured to control a voltage to be applied to the memory cell, wherein the controller comprises: a reset operation to bring the memory cell into a reset state by applying a first reset voltage to the memory cell;a first operation to apply a set voltage between the first wire and the second wire, which are connected to the memory cell to be set;a second operation to determine whether a current flowing to the memory cell to be set exceeds a first threshold when a first reading voltage is applied between the first wire and the second wire, which are connected to the memory cell to be set, after the first operation;a third operation to determine whether a current flowing to the memory cell to be set exceeds a second threshold when a second reading voltage is applied between the first wire and the second wire, which are connected to the memory cell to be set, when it has been determined in the second operation that the current has exceeded the first threshold; anda fourth operation to apply a second reset voltage, in which an absolute value is smaller than the first reset voltage, between the first wire and the second wire, which are connected to the memory cell to be set, when it has been determined in the third operation that the current has exceeded the second threshold.
地址 Minato-ku JP