摘要 |
<p>PROBLEM TO BE SOLVED: To accomplish high efficiency by improving a latch-up characteristic in a MOS gate type power transistor of a trench structure. SOLUTION: A trench 18 of a body region 35 is formed, impurities are doped to a P<+> -diffused region 36 from the bottom of the trench 18, and then impurities are doped to an N<+> -source region 19 from the sidewall of the trench 18. Thermal diffusion is performed at the same time on the impurity doping, and a doubly diffused region is formed. As a result, a doubly diffused structure, in which a high density diffused region 36 is positioned overall under the source region 19, is formed, the resistance under the source region 19 is reduced, and a forward voltage is dropped. Also, a P-body region is reduced by the trench structure, a low density and small type N<+> -source region is obtained by the doubly diffused structure, and the improved current density and the low emitter efficiency of a parasitic transistor is obtained.</p> |