| 摘要 |
<p>An analog-to-digital (A/D) converter of the successive-approximation type wherein the digital-to-analog converter (DAC) includes a charge-redistribution, binary-weighted switched-capacitor array (12) for producing the analog output for comparison with the analog input signal. A second switched-capacitor DAC (20) is employed to develop error correction signals to be combined with the analog signal from the A/D conversion DAC. The conversion DAC array is connected to one input terminal (16) of the comparator (18) and the error-correction DAC array is connected to the other comparator input terminal (22), an arrangement which reduces the number of capacitors required while providing symmetrical capacitance loading of the comparator input circuit.</p> |
